It's no secret RISC-V is getting big. The spec's are open, no one charges a royalty for the privilege using the instruction set and some of the RISC-V chips people are making are positively tiny.
The biggest problem I see with RISC-V is existing documentation is intended for chip designers. That's no great shock, I suppose. David Patterson, the godfather of RISC-V, is a very well regarded chip design researcher.
Some online forums recommend you read Patterson and Hennessy's Computer Organization and Design before even thinking about reading the RISC-V specs. And there's some wisdom in that advice. For the past ten years of online discussions, most of the people in the RISC-V community have taken upper division or graduate classes on chip design. The RISC-V specs are largely intelligable to mere mortals, but much of the online commentary assumes you took Patterson's computer architecture course.
The articles here are for "mere mortals." They're for people who know C and aren't frightened of assembly language. There are plenty of people who need to know the basics of what goes on under the hood on a RISC-V system, but don't have time to return to school to get an EE degree from Berkeley.
And the articles here are "byte sized." No need to invest hours in monolithic reading jags. Read an article or two. If you don't like it, you haven't sunk too much into it.
If you're unfamiliar with RISC-V, start with What is RISC-V and Why Should I Care? or RISCV Is a Base Instruction Set Plus Extensions.